nxp 30 mhz 32-bit cortex-m0+ mcu lpc800 key features 4 arm cortex-m0+ ? processor C up to 30 mhz C backward compatibility to the cortex-m0 ? C upwards compatibility with cortex-m3 ? and cortex-m4 ? C nested vectored interrupt controller (nvic) C serial wire debug (swd) and jtag boundary scan modes C micro trace buffer (mtb) C single cycle access to all port pins 4 memories: C up to 16 kb flash (with 64 byte page size) C 4 kb sram 4 serial peripherals C three usart interfaces C two spi controllers C one i 2 c-bus interface 4 timers C multiple-channel multi-rate timer (mrt) C state confgurable timer (sct) C self wake-up timer (wkt) clocked from either the irc or a low-power clock source C windowed watchdog timer (wwdt) C system tick timer 4 analog peripherals C comparator with external voltage reference 4 i/o C switch matrix for fexible confguration of each i/o pin function C up to 18 general-purpose i/o (gpio) pins C gpio interrupt generation capability with boolean pattern-matching capability C digital glitch flter with programmable time constant 4 clock generation unit C 12 mhz internal rc oscillator trimmed to 1% accuracy C crystal oscillator with an operating range of 1 mhz to 25 mhz C programmable watchdog oscillator C 10 khz low-power oscillator for the wkt. C pll allows max cpu rate without a high-frequency crystal. 4 other C rom drivers for i 2 c, usart, power profles, isp, and iap C easy to use low pin-count tssop and dip packages C crc engine C single vdd power supply (1.8 v to 3.6 v) a 32-bit microcontroller designed for the 8-bit world the lpc800 combines the simplicity and ease of use of 8-bit micros, the versatility of 32-bit micros and a set of peripherals that will change the way designers look at fexibility and scalability. every peripheral on this chip was redesigned from the ground up with the low-cost 8-bit market in mind.
www.nxp.com ? 2012 nxp semiconductors, b.v. all rights reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. date of release: november 2012 document order number: 9397 750 xxxx printed in the usa the lpc800 family is extremely power-effcient and straightforward to use. based on an ultra-low-power 30-mhz arm ? cortex-m0+ processor, the lpc800 is fully compatible with the cortex-m architecture and instruction set. the cortex-m0+ handles 32- bit data more effciently than 8-bit processor by requiring less code, memory and 30% less dynamic power from the cortex-m0+ processor. at the same time, it easily outperforms 8-bit and 16-bit mcus. the lpc800 includes two innovative features controlled via gui-based confguration tools. a new fexible switch matrix enables designers to assign on-chip peripherals to any pin, giving the lpc800 enormous fexibility without adding complexity. the state confgurable timer (sct) combines a powerful 32-bit timer or two 16-bit timers with a confgurable state machine. in the lpc800, the sct implements virtually any timing or pwm function found on popular 8-bit mcus. the lpc800 is available in a range of low-pin-count packages, including so20, tssop20, tssop16, and dip8. development tools lpcxpresso, the full-featured, easy-to-use eclipse- based software development tool, supports the complete product design cycle for the lpc800. the lpc800 is also fully supported by the keil-mdk by arm, the embedded workbench from iar systems, as well as other third party development tools. additional support, free tools, and sample code are available on the web at www.lpcware.com. for further information on lpcxpresso, visit www.nxp. com/lpcxpresso. lpc800 block diagram lpcxpresso development tool lpc800: low power cortex-m0+ timers analog arm cortex-m0+ 30 mhz flash 16 kb sram 4 kb rom crc engine spi (2) i 2 c uart (3) sct 4ch multi-rate timer wdt wake-up timer serial interfaces iop ahb-lite bus apb bus gpio (up to 18) system power control pmu, power modes, bod, single vdd power supply, por comparator with external vref clock generation unit 12 mhz, 1% irc osc, watchdog osc, 1-25 mhz system osc, system pll switch matrix gpio pads bridge ordering information xnpsi ysox kd,.mo bvdt xisvl ysogsm s p by 0dv bp tv pc, pc, om y lpc810 m021fn8 1 4 dip8 1 1 2 1 1, 4ch 1 6 lpc811 m001fdh16 2 8 tssop16 1 1 2 1 1, 4ch 1 ? 14 lpc812 m101fdh16 4 16 tssop16 1 2 3 1 1, 4ch 1 ? 14 lpc812 m101fd20 4 16 so20 1 1 2 1 1, 4ch 1 ? 18 lpc812 m101fdh20 4 16 tssop20 1 2 3 1 1, 4ch 1 ? 18 hs usb interface lpcxpresso powered by -m3 -m0 -m0+ lpc1100 lpc11c00 lpc11u00 lpc1200 lpc1300 lpc1700 lpc800
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